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> ## User Diagnostics: Broadcom NetXtreme® 57XX User Guide

> Introduction

> System Requirements

> Running Broadcom NetXtreme User Diagnostics

> Diagnostic Test Descriptions

> Diagnostic Test Messages

> ### Introduction

> Broadcom NetXtreme User Diagnostics is an MS-DOS based application that runs a series of diagnostic tests (see Table 1: "MS-DOS Command Prompt Mode Command Options") on the Broadcom NetXtreme Gigabit Ethernet adapters in your system. Broadcom NetXtreme User Diagnostics also allows you to update device firmware and to view and change settings for available adapter properties. Broadcom NetXtreme User Diagnostics can be run in either of the following modes:

> - MS-DOS Command Prompt mode
> - Broadcom Command Line Interface (CLI) mode

> In either mode, you can view the version of the adapter software and specify which adapter to test and which tests to perform. The MS-DOS Command Prompt mode is useful for viewing and changing the settings for available properties, updating and loading device firmware, viewing the version of and printing the error log (if any) to a file. The Broadcom CLI mode is useful for enabling/disabling available properties and enabling/disabling/selecting and setting the speed and duplex mode of available protocols.

> To run Broadcom NetXtreme User Diagnostics, create an MS-DOS 6.22 bootable disk containing the B57udiag.exe file. Next, start the system with the boot disk in drive A. See either Running in MS-DOS Command Prompt Mode or Running in Broadcom Command Line Interface Mode for further instructions.

> ### System Requirements

> Operating System: MS-DOS 6.22

> Software: B57udiag.exe

> ### Running Broadcom NetXtreme User Diagnostics

> #### Running in MS-DOS Command Prompt Mode

> At the MS-DOS prompt, type b57udiag using the command options as shown in Table 1.

> NOTE: In MS-DOS Command Prompt mode, you must include b57udiag at the beginning of the command string each time you type a command.

> Table 1: MS-DOS Command Prompt Mode Command Options
> Command Options | Description
> --- | ---
> b57udiag | Performs all of the tests on all of the Broadcom NetXtreme Gigabit Ethernet adapters in your system.
> b57udiag -c <num> | Specifies the adapter to test, or the adapter on which to update the firmware or to view or change the settings for available properties.
> b57udiag -cmd | Changes to the Broadcom CLI mode.
> b57udiag -w <value> | Enables/disables the Wake on LAN (WOL) property. 1 = Enable 0 = Disable
> b57udiag -mba <value> | Enables/disables Multi-Boot Agent (MBA) protocol. 1 = Enable 0 = Disable
> b57udiag -mbap <value> | Selects the specific MBA protocol. 0 = Preboot Execution Environment (PXE) 1 = Remote Program Load (RPL) 2 = Bootstrap Protocol (BOOTP)
> b57udiag -mbas <value> | Selects the MBA speed and duplex mode. 0 = Auto 1 = 10 Mbps speed, half-duplex operation 2 = 10 Mbps speed, full-duplex operation 3 = 100 Mbps speed, half-duplex operation 4 = 100 Mbps speed, full-duplex operation 6 = 1000 Mbps speed, full-duplex (fiber)
> b57udiag -firm <file> | Updates the EEPROM of the selected adapter based on the match between the existing image file name and the new image <file name>. Examples:
>     b57udiag -firm ee5751c3.40a
>     b57udiag -firm ee5721c3.40a
> b57udiag -firmall <file> | Updates the EEPROM of all of the adapters based on the <file name> image match.
> b57udiag -ver | Displays the version of the software/eeprom.bin file.
> b57udiag -pxe <file> | Loads the Preboot Execution Environment (PXE) firmware from a file. Example:
>     b57udiag -pxe b57mmba.nic
> Note: This command should be used only for add-in adapters. For LOM adapters, the PXE firmware is loaded automatically during startup.
> b57udiag -elog <file> | Prints the error log to a file.
> b57udiag -pipmi <file> | Loads the Intelligent Platform Management Interface (IPMI) from a file.
>     b57udiag -pipmi pt5721c6.10
>     b57udiag -pipmi pt5704c2.36
>     b57udiag -pipmi pt5704s2.36
> Use the file that is appropriate for the type of hardware interface (copper or fiber). For example, the pt5704c2.36 file should be used for copper, and the pt5704s2.36 file should be used for fiber.
> b57udiag -ipmi <value> | Enables/disables IPMI. 1 = Enable 0 = Disable
> b57udiag -help | Displays this table of MS-DOS Command Prompt Mode Command Options.

> #### Running in Broadcom Command Line Interface Mode

> At the MS-DOS prompt, type `b57udiag -cmd`, and use the command options as shown in Table 2

> NOTE: The values for settings are in decimal notation unless otherwise indicated.

> Table 2: Broadcom Command Line Interface (CLI) Mode Commands
> Command | Description
> --- | ---
> upgfrm | Updates the PXE or Boot Code from a file
> dir | Displays the file directory in NVRAM. Example:
>     Entry  Type             SRAM Addr EEP Offset  Length    Execute   Version
>            Boot Code        08003000  00000200    000011B0  CPUA(2)   5721-v6.17
>     0      PXE              00010000  000013Bo    0000C854  NO        7.0.1
>     1      AdvancedFw CFG   00000000  0001027C    000001D4  NO        IPMIc V2.15
>     2      AdvancedFw CPUB  C0034000  00010450    00002654  NO        IPMIc V2.15
>     3      AdvancedFw CPUA  08000000  00012AA4    000035B4  NO        IPMIc V2.15
>     4      AdvancedFwINIT   C0034000  00016058    00001A94  CPUB      IPMIc V2.15
> setwol | Enables/disables the Wake on LAN (WOL) property. `setwol e` = Enable WOL `setwol d` = Disable WOL
> setpxe | Enables/disables Preboot Exchange Environment (PXE) and sets PXE speed `setpxe e` = Enable PXE `setpxe d` = Disable PXE `setpxe s 0` = Auto (Default) `setpxe s 1` = 10 Mbps speed, half-duplex operation `setpxe s 2` = 10 Mbps speed, full-duplex operation `setpxe s 3` = 100 Mbps speed, half-duplex operation `setpxe s 4` = 100 Mbps speed, full-duplex operation
> setasf | Enables/disables Alert Standard Format (ASF) Do not use. Alert Standard Format (ASF) is not for system platforms.
> setmba | Enables/disables Multi Boot Agent (MBA) and selects the MBA protocol `setmba d` = Disable MBA `setmba e 0` = Enable Preboot Execution Environment (PXE) MBA (default) `setmba e 1` = Enable Remote Program Load (RPL) MBA `setmba e 2` = Enable Boot Protocol (BootP) MBA `setmba s 0` = Auto speed and duplex (default) `setmba s 1` = 10 Mbps speed, half-duplex operation `setmba s 2` = 10 Mbps speed, full-duplex operation `setmba s 3` = 100 Mbps speed, half-duplex operation `setmba s 4` = 100 Mbps speed, full-duplex operation `setmba s 6` = 1000 Mbps full-duplex (fiber)
> setipmi | Enables/disables Intelligent Platform Management Interface (IPMI) `setipmi e` = Enable IPMI `setipmi d` = Disable IPMI
> nictest | Runs the specified diagnostic tests Specify which individual test(s) within a group or which group(s) of tests to run by including the test designation or group designation in the command string, as shown in the examples below: `nictest abcd` = Run all tests `nictest b` = Run all tests in group B `nictest a3b1` = Run tests A3 and B1 only `nictest a124b2` = Run tests A1, A2, A4, and B2
> exit | Changes from the Broadcom CLI mode to the MS-DOS command prompt mode
> device | Selects the device (adapter) `device <n>` = Device number in hexadecimal notation (default = 00000000) `device r` = Remove all current Broadcom adapters and rescan available adapters `device s` = Silent mode (adapters are not displayed)
> version | Displays the version of the adapter software
> help | Displays this list of commands
> reset | Resets the Broadcom NetXtreme Gigabit Ethernet chip `reset c` = Simulate a cold reset `reset w` = Wait for firmware signature `reset t` = Display the time from reset to firmware invert signature
> cls | Clears the screen
> asfprg | Loads Alert Standard Format (ASF) into NVRAM Do not use. Alert Standard Format (ASF) is not for system platforms.

> ### Diagnostic Test Descriptions

> The diagnostic tests are divided into 4 groups: Register Tests (Group A), Memory Tests (Group B), Miscellaneous Tests (Group C), and Driver Associated Tests (Group D). The diagnostic tests are listed and described in Table 3.

> Table 3: Diagnostic Tests
> Test | Description
> --- | ---
> Number | Name
> Group A: Register Tests
> A1 | Indirect Register | This test uses an indirect addressing method to write an increment of data to the MAC hash register table and read back data for verification. The memory read/write is done 100 times while incrementing test data.
> A2 | Control Register | Each register specified in the configuration content defines the read-only bit and the read/write bits. The test writes 0s and 1s to the test bits to ensure the read-only bits are not changed, and that read/write bits are changed. This test attempts to read the register configuration file (Ctrlreg.txt) for the register definitions. If the file does not exist, a default register offset and mask bits are used.
>     Offset       Read-Only Mask   Read/Write Mask
>     0x00000400   0x00000000       0x007FFF8C
>     0x00000404   0x03800107       0x00000000
> A3 | Interrupt | This test verifies the interrupt functionality. It enables an interrupt and waits 500 ms for the interrupt to occur and reports an error if it cannot generate the interrupt.
> A4 | Built-In Self-Test | This is the hardware built-in self-test (BIST).
> A5 | PCI Cfg Register | This test verifies the access integrity of the PCI configuration registers.
> Group B: Memory Tests
> B1 | Scratch Pad | This test tests the onboard scratchpad SRAM. The following tests are performed: Address Test. This test writes each address with a unique increment of data and reads back data to ensure data is correct. After filling the entire address with the unique data, the program reads back the data again to ensure that the data is still correct. Walking bit. For each address, data one is written and read back for testing. Then it shifts the data left one bit, so the data becomes two and repeats the same test. It repeats the test 32 times until the test bit is shifted out of the test address. The same test is repeated for entire test range. Pseudo-Random Data. A precalculated pseudo-random data set is used to write unique data to each test RAM. After passing the test, the program reads back the data one more time to ensure that the data is still correct. Data Read/Write Test: This test writes test data to the SRAM and reads it back to ensure that the data is correct. The test data used is 0x00000000, 0xFFFFFFFF, 0xAA55AA55, and 0x55AA55AA. Alternate Data Pattern Test. This test writes test data into the SRAM, writes complement test data to the next address, and reads back both to ensure the data is correct. After the test, the program reads back data one more time to ensure that the data is still correct. The test data used is 0x00000000, 0xFFFFFFFF, 0xAA55AA55, and 0x55AA55AA.
> B2 | BD SRAM | This test tests the Buffer Descriptor (BD) SRAM. This test performs in the same way as the Scratch Pad Test described in B1.
> B3 | DMA SRAM | This test tests the direct memory access (DMA) SRAM by performing the Scratch Pad Test described in test B1.
> B4 | MBUF SRAM | This test tests the memory access buffer (MBUF) SRAM by performing the Scratch Pad Test described in test B1.
> B5 | MBUF SRAM via DMA | This test uses 8 data test patterns. A 0x1000-sized data buffer is used for this test. Before each pattern test, the buffer is initialized and filled with the test pattern. It then performs a 0x1000-sized transmit DMA from the host buffer to the adapter MBUF memory. The test verifies the data integrity in the adapter MBUF memory against the host memory and repeats the DMA for the entire MBUF buffer. Then, the test performs a receive DMA from the adapter to the host. The 0x1000-byte test buffer is cleared to 0 before each receive DMA. After the test verifies the integrity of the data, the test is repeated for the entire MBUF SRAM range. The 8 test patterns are described below. Test Pattern Description
>     16 00s and 16 FF's  Fills the entire host DMA buffer with 16 bytes of 00s and then 16 bytes of FF's.
>     16 FF's and 16 00s  Fills the entire host DMA buffer with 16 bytes of FF's and then 16 bytes of 00s.
>     32 00s and 32 FF's  Fills the entire host DMA buffer with 32 bytes of 00s and then 32 bytes of FF's.
>     32 FF's and 32 00s  Fills the entire host DMA buffer with 32 bytes of FF's and then 32 bytes of 00s.
>     00000000  Fills the entire host DMA buffer with all 00s.
>     FFFFFFFF  Fills the entire host DMA buffer with all FF's.
>     AA55AA55  Fills the entire host DMA buffer with data 0xAA55AA55.
>     55AA55AA  Fills the entire host DMA buffer with data 0x55AA55AA.
> B7 | CPU GPR | This test tests the CPU General Purpose registers and performs in the same way as the Scratch Pad Test (B1) over 3 different voltages (1.1V, 1.2V, and 1.3V).
> Group C: Miscellaneous Tests
> C1 | NVRAM | Incremental test data is used in the electrically erasable programmable read-only memory (EEPROM) test. The test fills the test range with test data and reads the data back to verify the content. Afterwards, the test fills the test range with 0s to clear the memory.
> C2 | CPU | This test opens the Cpu.bin file. If the file exists and content is good, the test loads code to the RX CPU and TX CPU and verifies the CPU execution.
> C3 | DMA | This test tests both high-priority direct memory access (DMA) and low-priority DMA. The test moves data from the host memory to the adapter SRAM and verifies the data. The test then moves data back to the host memory to again verify the data.
> C4 | MII | The medium independent interface (MII) test function is identical to that of the Control Register Test (A2). Each register specified in the configuration contents defines the read-only and read/write bits. The test writes 0s and 1s to the test bits to ensure that the read-only bit values are not changed and that the read/write bits are changed. The test attempts to read the register configuration file (Miireg.txt) for the register definitions. If the file does not exist, the following table is used:
>     Offset  Read-Only Mask  Read/Write Mask
>     0x00    0x0000          0x7180
>     0x02    0xFFFF          0x0000
>     0x03    0xFFFF          0x0000
>     0x04    0x0000          0xFFFF
>     0x05    0xEFFF          0x0000
>     0x06    0x0001          0x0000
>     0x07    0x0800          0xB7FF
>     0x08    0xFFFF          0x0000
>     0x09    0x0000          0xFF00
>     0x0A    0x7C00          0x0000
>     0x10    0x0000          0xFFBF
>     0x11    0x7C00          0x0000
>     0x19    0x7C00          0x0000
>     0x1E    0x0000          0xFFFF
>     0x1F    0x0000          0xFFFF
> C5 | VPD | The VPD test first saves the contents of the vital product data (VPD) memory before performing the test. The test then writes 1 of the 5 test data patterns (0xFF, 0xAA, 0x55, increment data, or decrement data) into VPD memory. By default, an incremental data pattern is used. The test writes and reads back the data for the entire test range, and then restores the original contents of the VPD memory.
> C6 | ASF Hardware | Reset Test. This test sets the reset bit and polls for self-clearing bits. This test verifies the reset value of the registers. Event Mapping Test. This test sets the SMB_ATTN bit. By changing ASF_ATTN_ LOC bits, the test verifies the mapping bits in TX_CPU or RX_CPU event bits. Counter Test Clears WG_TO, HB_TO, PA_TO, PL_TO, RT_TO bits (by setting the bits) and ensures that the bits clear. Clears the timestamp counter. Writes a 1 to each of the PL, PA, HB, WG, RT counters. Sets the TSC_EN bit. Polls each PA_TO bit and counts up to 50. Checks if the PL_TO bit is set at the end of the count to 50. Continues to count up to 200. Checks if all other TO bits are set and verifies if the timestamp counter is incremented.
> C7 | Expansion ROM | This test tests the ability to enable, disable, and access the expansion read-only memory (ROM) on the adapter.
> C8 | CPU Fetch | This test tests the PCU instruction fetch logic 100 times.
> Group D: Driver Associated Tests
> D1 | MAC Loopback | This test is an internal loopback data transmit/receive test. It initializes the medium access control (MAC) into an internal loopback mode and transmits 100 packets. The data should be routed back to the receive channel and received by the receive routine, which verifies the integrity of data. A 100-Mbit/s data rate is used for this test unless Gigabit Ethernet is enabled.
> D2 | PHY Loopback | This test is same as the MAC loopback test (D1), except that the data is routed back via a physical layer device (PHY). A 100-Mbit/s data rate is used for this test unless Gigabit Ethernet is enabled.
> D5 | MII Miscellaneous | This test tests the autopolling and PHY interrupt capabilities. These are functions of the PHY.
> D6 | MSI | This test tests the message signal interrupt (MSI) capability of the adapter. Refer to PCI Specification, version 2.3, for the MSI definition.

> ### Diagnostic Test Messages

>     /* 0 */ 	"PASS",

>     /* 1 */ 	"Got 0x%08X @ 0x%08X. Expected 0x%08X",

>     /* 2 */ 	"Cannot perform task while chip is running",

>     /* 3 */ 	"Invalid NIC device",

>     /* 4 */ 	"Read-only bit %s got changed after writing zero
>     at offset 0x%X",

>     /* 5 */ 	"Read-only bit %s got changed after writing one
>     at offset 0x%X",

>     /* 6 */ 	"Read/Write bit %s did not get cleared after writing zero
>     at offset 0x%X",

>     /* 7 */ 	"Read/Write bit %s did not get set after writing one
>     at offset 0x%X",

>     /* 8 */ 	"BIST failed",

>     /* 9 */ 	"Could not generate interrupt",

>     /* 10 */ 	"Aborted by user",

>     /* 11 */ 	"TX DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",

>     /* 12 */ 	"Rx DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",

>     /* 13 */ 	"TX DMA failed",

>     /* 14 */ 	"Rx DMA failed",

>     /* 15 */ 	"Data error, got 0x%08X at 0x%08X, expected 0x%08X",

>     /* 16 */ 	"Second read error, got 0x%08X at 0x%08X, expected 0x%08X",

>     /* 17 */ 	"Failed writing EEPROM at 0x%04X",

>     /* 18 */ 	"Failed reading EEPROM at 0x%04X",

>     /* 19 */ 	"EEPROM data error, got 0x08X at 0x04X, expected 0x%08X",

>     /* 20 */ 	"Cannot open file %s",

>     /* 21 */ 	"Invalid CPU image file %s",

>     /* 22 */ 	"Invalid CPU image size %d",

>     /* 23 */ 	"Cannot allocate memory",

>     /* 24 */ 	"Cannot reset CPU",

>     /* 25 */ 	"Cannot release CPU",

>     /* 26 */ 	"CPU test failed",

>     /* 27 */ 	"Invalid Test Address Range\nValid NIC address is
>     0x%08X-0x%08X and exclude 0x%08X-0x%08X",

>     /* 28 */  "DMA:Got 0x%08X @ 0x%08X. Expected 0x%08X",

>     /* 29 */  "Unsupported PhyId %04X:%04X",

>     /* 30 */  "Too many registers specified in the file, max is %d",

>     /* 31 */ 	"Cannot write to VPD memory",

>     /* 32 */ 	"VPD data error, got %08X @ 0x04X, expected %08X",

>     /* 33 */ 	"No good link! Check Loopback plug",

>     /* 34 */ 	"Cannot TX Packet!",

>     /* 35 */ 	"Requested to TX %d. Only %d is transmitted",

>     /* 36 */	"Expected %d packets. Only %d good packet(s) have been
>     received\n%d unknown packets have been received.\n%d bad packets
>     have been received.",

>     /* 37 */ 	"%c%d is an invalid Test",

>     /* 38 */ 	"EEPROM checksum error",

>     /* 39 */ 	"Error in reading WOL/PXE",

>     /* 40 */ 	"Error in writing WOL/PXE",

>     /* 41 */ 	"No external memory detected",

>     /* 42 */ 	"DMA buffer %04X is large, size must be less than %04X",

>     /* 43 */ 	"File size %d is too big, max is %d",

>     /* 44 */ 	"Invalid %s",

>     /* 45 */ 	"Failed writing 0x%x to 0x%x",

>     /* 46 */ 	"",

>     /* 47 */ 	"Ambiguous command",

>     /* 48 */ 	"Unknown command",

>     /* 49 */ 	"Invalid option",

>     /* 50 */ 	"Cannot perform task while chip is not running. (need driver)",

>     /* 51 */ 	"Cannot open register define file or content is bad",

>     /* 52 */ 	"ASF Reset bit did not self-clear",

>     /* 53 */ 	"ATTN_LOC %d cannot be mapped to %cX CPU event bit %d",

>     /* 54 */ 	"%s Register is not cleared to zero after reset",

>     /* 55 */ 	"Cannot start poll_ASF Timer",

>     /* 56 */ 	"poll_ASF bit did not get reset after acknowledged",

>     /* 57 */ 	"Timestamp Counter is not counting",

>     /* 58 */ 	"%s Timer is not working",

>     /* 59 */ 	"Cannot clear bit %s in %cx CPU event register",

>     /* 60 */ 	"Invalid "EEPROM_FILENAME" file size, expected %d but
>     only can read %d bytes",

>     /* 61 */ 	"Invalid magic value in %s, expected %08x but found %08x",

>     /* 62 */ 	"Invalid manufacture revision, expected %c but found %c",

>     /* 63 */ 	"Invalid Boot Code revision, expected %d.%d but found %d.%d",

>     /* 64 */ 	"Cannot write to EEPROM",

>     /* 65 */ 	"Cannot read from EEPROM",

>     /* 66 */ 	"Invalid Checksum",

>     /* 67 */ 	"Invalid Magic Value",

>     /* 68 */ 	"Invalid MAC address, expected %02X-%02X-%02X-%02X-%02X-%02X",

>     /* 69 */ 	"Slot error, expected an UUT to be found at location %02X:%02X:00",

>     /* 70 */ 	"Adjacent memory has been corrupted while testing block
>     0x%08x-0x%08x\nGot 0x%08x @ address 0x%08x. Expected 0x%08x",

>     /* 71 */ 	"The function is not Supported in this chip",

>     /* 72 */ 	"Packets received with CRC error",

>     /* 73 */ 	"MII error bits set: %04x",

>     /* 74 */ 	"CPU does not initialize MAC address register correctly",

>     /* 75 */ 	"Invalid firmware file format",

>     /* 76 */ 	"Resetting TX CPU Failed",

>     /* 77 */ 	"Resetting RX CPU Failed",

>     /* 78 */ 	"Invalid MAC address",

>     /* 79 */ 	"Mac address registers are not initialized correctly",

>     /* 80 */ 	"EEPROM Bootstrap checksum error",

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